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Property:complete (procfs)

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Name-Collision - multiple objects in this wiki use the name complete!
complete (bashcmd) Specify how arguments are to be completed by Readline.
complete (procfs) Test: Run all standard tests of the MemBench Benchmark.

Procfs-Object

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Details

complete is an open source RAM Benchmark by AVM which runs all standard tests of the MemBench suite.
Initially located at /proc/avm it was moved to /proc/avm/benchmark later. See the Path in the Model-Matrix.

This test runs all 4 standard tests which are available on every platform supported by the MemBench suite:

The same 4 tests are used to compute the performance_index.

The platform specific tests are not included:

complete is part of the MemBench suite. For an overview of all tests see help (procfs) and the Benchmark article.

Examples

7530 fw 7.29 example:

root@fritz1:/var/mod/root# cat /proc/avm/benchmark/complete

cat: read error: Cannot allocate memory

6490 fw 7.29 example - ATOM side:

root@fritz2:/var/mod/root# cat /proc/avm/benchmark/complete

AVM-RAM-Benchmark
=================================
IRQs: off (alle Tests mit deaktivierten IRQs) CPU-Clock: 1200042000 RAM-Clock: 100000000 (eff. Datentaktrate) BUS-Breite (Word=): 32 Bit Measure-Time: 1 * 1.0s -- Results --
=================================================================
type  ! total read ! loops ! DDR-Ticks ! 32Bit  !  ! in kb  !  ! /32Bit  ! Worte/s  ! kB/s
=================================================================
read  ! 554496  ! 1  ! 0.704 ! 141950976 ! 554496  !  !  !  !  ! Lineares Lesen aus dem RAM
read  ! 655872  ! 1  ! 0.595 ! 167903232 ! 655872  !  !  !  !  ! Die gelesenen Werte stehen im Speicher nicht hintereinander. D.h. die CPU kann den Cache nicht nutzen.
read/write  ! 235520  ! 1  ! 1.658 ! 60293120 ! 235520  !  !  !  !  ! Immer schoen im Wechsel 1x Lesen und 1x Schreiben.
write  ! 732672  ! 1  ! 0.533 ! 187564032 ! 732672  !  !  !  !  ! Lineares Schreiben in den RAM.

6490 fw 7.29 example - ARM side:

root@fritz2:/var/mod/root# rpc cat /proc/avm/benchmark/complete

AVM-RAM-Benchmark
=================================
IRQs: off (alle Tests mit deaktivierten IRQs) CPU-Clock: 450000000 RAM-Clock: 250000000 (eff. Datentaktrate) BUS-Breite (Word=): 32 Bit Measure-Time: 1 * 1.0s -- Results --
=================================================================
type  ! total read ! loops ! DDR-Ticks ! 32Bit  !  ! in kb  !  ! /32Bit  ! Worte/s  ! kB/s
=================================================================
read  ! 122304  ! 1  ! 7.984 ! 31309824 ! 122304  !  !  !  !  ! Burstartiges Lesen aus dem RAM unter Nutzung von load multiple.
read  ! 103168  ! 1  ! 9.465 ! 26411008 ! 103168  !  !  !  !  ! Die gelesenen Werte stehen im Speicher nicht hintereinander. D.h. die CPU kann den Cache nicht nutzen.
read/write  ! 85824  ! 1  ! 11.379 ! 21970944 ! 85824  !  !  !  !  ! Immer schoen im Wechsel 1x Lesen und 1x Schreiben.
write  ! 128832  ! 1  ! 7.580 ! 32980992 ! 128832  !  !  !  !  ! Einfaches Schreiben (Cache-Nutzung).
write  ! 776512  ! 1  ! 1.257 ! 198787072 ! 776512  !  !  !  !  ! Burst-Schreiben unter Nutzung von store multiple.

7490 fw 7.29 example:

fritz3:/var/mod/root $ cat /proc/avm/complete

AVM-RAM-Benchmark
=================================
IRQs: off (alle Tests mit deaktivierten IRQs) CPU-Clock: 500000000 RAM-Clock: 500000000 (eff. Datentaktrate) BUS-Breite (Word=): 16 Bit Measure-Time: 1 * 1.0s -- Results --
============================================================================
type  ! total read ! loops ! DDR-Ticks ! 16Bit  !  ! Stalls per  !  ! in kb  !  ! /16Bit  ! Worte/s  ! kB/s  ! Instruction !
============================================================================
read  ! 263872  ! 1  ! 3.700 ! 135102464 ! 263872 ! 4.453  ! Pipeline-friendly !  !  !  !  !  !  ! Lesen aus dem RAM mit optimaler Unterstuetzung der Pipline.  !  !  ! D.h. der Code ist gewaehlt, dass die Pipeline nicht geleert  !  !  ! werden muss und so keine Zeit verschwendet wird.  !  !  !
read  ! 248768  ! 1  ! 3.925 ! 127369216 ! 248768 ! 5.538  ! extrema  !  !  !  !  !  !  ! Die gelesenen Werte stehen im Speicher nicht hintereinander.  !  !  ! D.h. die CPU kann den Cache nicht nutzen.  !  !  !
read/write  ! 134528  ! 1  ! 7.259 ! 68878336 ! 134528 ! 3.599  !  !  !  !  !  !  !  ! Immer schoen im Wechsel 1x Lesen und 1x Schreiben.  !  !  !
write  ! 345536  ! 1  ! 2.826 ! 176914432 ! 345536 ! 3.126  !  !  !  !  !  !  !  ! Einfaches Schreiben.  !  !  !

7390 fw 6.04 example:

root@7390:/var/mod/root# cat /proc/avm/complete

AVM-RAM-Benchmark
=================================
IRQs: off (alle Tests mit deaktivierten IRQs) CPU-Clock: 500000000 RAM-Clock: 333333332 (eff. Datentaktrate) BUS-Breite (Word=): 32 Bit Measure-Time: 1 * 1.0s -- Results --
=================================================================
type  ! total read ! loops ! DDR-Ticks ! 32Bit  !  ! in kb  !  ! /32Bit  ! Worte/s ! kB/s
=================================================================
read  ! 145472  ! 1  ! 8.950 ! 37240832 ! 145472 Pipeline-friendly !  !  !  !  ! Lesen aus dem RAM mit optimaler Unterstuetzung der Pipline.  ! D.h. der Code ist gewaehlt, dass die Pipeline nicht geleert  ! werden muss und so keine Zeit verschwendet wird.  !
read  ! 150784  ! 1  ! 8.635 ! 38600704 ! 150784 extrema  !  !  !  !  ! Die gelesenen Werte stehen im Speicher nicht hintereinander. ! D.h. die CPU kann den Cache nicht nutzen.  !
read/write  ! 102144  ! 1  ! 12.747 ! 26148864 ! 102144  !  !  !  !  ! Immer schoen im Wechsel 1x Lesen und 1x Schreiben.  !
write  ! 95104  ! 1  ! 13.691 ! 24346624 ! 95104  !  !  !  !  ! Einfaches Schreiben.  !

7240 fw 6.06 example:

root@fritz:/var/mod/root# cat /proc/avm/complete

AVM-RAM-Benchmark
=================================
IRQs: off (alle Tests mit deaktivierten IRQs) CPU-Clock: 360000000 RAM-Clock: 120000000 (eff. Datentaktrate) BUS-Breite (Word=): 16 Bit Measure-Time: 1 * 1.0s -- Results --
=================================================================
type  ! total read ! loops ! DDR-Ticks ! 16Bit  !  ! in kb  !  ! /16Bit  ! Worte/s ! kB/s
=================================================================
read  ! 133056  ! 1  ! 1.761 ! 68124672 ! 133056 Pipeline-friendly !  !  !  !  ! Lesen aus dem RAM mit optimaler Unterstuetzung der Pipline.  ! D.h. der Code ist gewaehlt, dass die Pipeline nicht geleert  ! werden muss und so keine Zeit verschwendet wird.  !
read  ! 100608  ! 1  ! 2.329 ! 51511296 ! 100608 extrema  !  !  !  !  ! Die gelesenen Werte stehen im Speicher nicht hintereinander. ! D.h. die CPU kann den Cache nicht nutzen.  !
read/write  ! 94464  ! 1  ! 2.481 ! 48365568 ! 94464  !  !  !  !  ! Immer schoen im Wechsel 1x Lesen und 1x Schreiben.  !
write  ! 276544  ! 1  ! 0.847 ! 141590528 ! 276544  !  !  !  !  ! Einfaches Schreiben.  !

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